Lightweight Post-Quantum-Secure Digital Signature Approach for IoT Motes

Internet-of-Things (IoT) applications often require constrained devices to be deployed in the field for several years, even decades. Protection of these tiny motes is crucial for end-to-end IoT security. Secure boot and attestation techniques are critical requirements in such devices which rely on public key Sign/Verify operations. In a not-so-distant future, quantum computers are expected to break traditional public key Sign/Verify functions (e.g. RSA and ECC signatures). Hash Based Signatures (HBS) schemes, on the other hand, are promising quantum-resistant alternatives. Their security is based on the security of cryptographic hash function which is known to be secure against quantum computers. The XMSS signature scheme is a modern HBS construction with several advantages but it requires thousands of hash operations per Sign/Verify operation, which could be challenging in resource constrained IoT motes. In this work, we investigated the use of the XMSS scheme targeting IoT constrained. We propose a latency-area optimized XMSS Sign or Verify scheme with 128-bit post-quantum security. An appropriate HW-SW architecture has been designed and implemented in FPGA and Silicon where it spans out to 1521 ALMs and 13.5k gates respectively. In total, each XMSS Sign/Verify operation takes 4.8 million clock cycles in our proposed HW-SW hybrid design approach which is 5.35 times faster than its pure SW execution latency on a 32-bit microcontroller

Anonymous Attestation for IoT

Internet of Things (IoT) have seen tremendous growth and are being deployed pervasively in areas such as home, surveillance, health-care and transportation. These devices collect and process sensitive data with respect to user\u27s privacy. Protecting the privacy of the user is an essential aspect of security, and anonymous attestation of IoT devices are critical to enable privacy-preserving mechanisms. Enhanced Privacy ID (EPID) is an industry-standard cryptographic scheme that offers anonymous attestation. It is based on group signature scheme constructed from bilinear pairings, and provides anonymity and sophisticated revocation capabilities (private-key based revocation and signature-based revocation). Despite the interesting privacy-preserving features, EPID operations are very computational and memory intensive. In this paper, we present a small footprint anonymous attestation solution based on EPID that can meet the stringent resource requirements of IoT devices. A specific modular-reduction technique targeting the EPID prime number has been developed resulting in 50% latency reduction compared to conventional reduction techniques. Furthermore, we developed a multi-exponentiation technique that significantly reduces the runtime memory requirements. Our proposed design can be implemented as SW-only, or it can utilize an integrated Elliptic Curve and Galois Field HW accelerator. The EPID SW stack has a small object code footprint of 22kB. We developed a prototype on a 32-bit microcontroller that computes EPID signature generation in 17.9s at 32MHz

Optimization for SPHINCS+ using Intel Secure Hash Algorithm Extensions

SPHINCS+ was selected as a candidate digital signature scheme for standardization by the NIST Post-Quantum Cryptography Standardization Process. It offers security capabilities relying only on the security of cryptographic hash functions. However, it is less efficient than the lattice-based schemes. In this paper, we present an optimized software library for the SPHINCS+ signature scheme, which combines the Intel® Secure Hash Algorithm Extensions (SHA-NI) and AVX2 vector instructions. We obtain significant speed-up of SPHINCS+-128f-simple on both non-optimized (70%) and AVX2 reference implementations (8% -23%) offering 128-bit security

Status and Prospects of IP Regime in India: Implications for Agricultural Education

Intellectual property rights (IPR) are ideas, inventions, and creative expressions based on which there is a public willingness to bestow the status of property, while technology management seeks to foster effective and efficient use of developed technology. In a dynamic global environment with changing industry and competitor landscapes, management of technologies including effective commercialization strategies using the IPR advantages gathers utmost importance.  In an agrarian country like India, the process of IP awareness can be catalysed only be educating the various stakeholders like policy makers, farmers, academia, industry, researchers and consumers about the importance of IPR and technology management. As Indian agriculture is reaching to new vistas of development and business becoming increasingly global, it is time for a "fresh think" to prevail in the IPR debate by creating much more awareness among academia, industry, policy makers and public. The initiatives taken on these lines by the Indian Council of Agricultural Research (ICAR) and other governmental and non-governmental agencies are explained in this paper. A paradigm shift in agri-education policies is envisaged to make the students of agriculture and allied courses more aware and competent and also enable them to face more challenges and competition in the changing vistas of IPR and technology management

Status and Prospects of IP Regime in India: Implications for Agricultural Education

189-201Intellectual property rights (IPR) are ideas, inventions, and creative expressions based on which there is a public willingness to bestow the status of property, while technology management seeks to foster effective and efficient use of developed technology. In a dynamic global environment with changing industry and competitor landscapes, management of technologies including effective commercialization strategies using the IPR advantages gathers utmost importance. In an agrarian country like India, the process of IP awareness can be catalysed only by educating the various stakeholders like policy makers, farmers, academia, industry, researchers and consumers about the importance of IPR and technology management. As Indian agriculture is attaining new vistas in development and agri-business is becoming increasingly global, it is time for a ‘fresh think’ to prevail in the IPR debate by creating much more awareness among academia, industry, policy makers and public. The initiatives taken on these lines by the Indian Council of Agricultural Research (ICAR) and other governmental and non-governmental agencies are explained in this paper. A paradigm shift in agri-education policies is envisaged to build the capacity of agricultural professionals in view of dynamic changes in IPR and technology management areas. </span

A Strategic Framework for Technology Valuation in Agriculture and Allied Sectors in India – Case Study of Chitosan

131-140Standardized tools for valuation of agricultural technologies developed in National Agricultural Research System of India are featured in this study with a generalised framework. A valuation pyramid with several levels of qualitative and quantitative approaches was designed. The new framework was articulated by a case study on production of Chitin & Chitosan from crustacean waste, a technology of Central Institute of Fisheries Technology, Kochi. The value of the novel technology was calculated using various methods, customized for the specific domain. With few suppositions at every level of the process flow, the value worth of the technology was calculated using different methods. This system attempts to deliver a valuation practice which is suitable for most of the technologies coming up in the public agricultural research system